CMOS Fractional-N Synthesizers starts with a comprehensive introduction to general frequency synthesis. Different architectures and synthesizer building blocks are discussed with their relative importance on synthesizer specifications. The process of synthesizer specification derivation is illustrated with the DCS-1800 standard as a general test case.
The book tackles the design of fractional-N synthesizers in CMOS on circuit level as well as system level. The circuit level focuses on high-speed prescaler design up to 12 GHz in CMOS and on fully integrated, low-phase-noise LC-VCO design. High-Q inductor integration and simulation in CMOS is elaborated and flicker noise minimization techniques are presented, ranging from bias point choice to noise filtering techniques.
On a higher level, a systematic design strategy has been developed that trades off all noise contributions and fast dynamics for integrated capacitance (area). Moreover, a theoretical DeltaSigma phase noise analysis is presented, extended with a fast non-linear analysis method to accurately predict the influence of PLL non-linearities on the spectral purity of the DeltaSigma fractional-N frequency synthesizers.
CMOS Fractional-N Synthesizers covers the total design flow of monolithic CMOS fractional-N synthesizers with high spectral purity while providing insight in the most critical issues of monolithic fractional-N synthesis. All material is experimentally verified with several CMOS implementations, with ultimately a monolithic CMOS &Dgr;&Sgr;-controlled fractional-N synthesizer, which was part of a CMOS DCS-1800 transceiver front-end. The book is essential reading for analog and RF design engineers and researchers in the field and it is also suitable as text book for an advanced course on the subject.
The author provides a wealth of practical guidance to the practicing professional. It describes how to compare results from differing projects and how to assess the risk of functional bugs at tape-out or at any other critical product juncture. The book also shows consumers how to compare IP offerings from multiple vendors. For producers, it describes how to verify IP in a manner that meets customer needs. Producers and consumers of silicon IP therefore have a solid framework to communicate requirements and to align expectations effectively and efficiently.
Standardized Functional Verification is a valuable reference for verification engineers and managers, and also for developers of verification software. The principles and theory this book describes will drive creation of the next generation of verification tools.
The book targets verification engineers as well as researchers. It covers both methodological and technical issues. Particular stress is given to the latest advances in functional verification.
The research community has witnessed recent growth of interests in constraint-based functional verification. Various techniques have been developed. They are relatively new, but have reached a level of maturity so that they are appearing in commercial tools such as Vera and System Verilog.
Aiming at the core of the problem, Reuse Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits presents a framework for the reuse-based design of AMS circuits. The framework is founded on three key elements: (1) a CAD-supported hierarchical design flow that facilitates the incorporation of AMS reusable blocks, reduces the overall design time, and expedites the management of increasing AMS design complexity; (2) a complete, clear definition of the AMS reusable block, structured into three separate facets or views: the behavioral, structural, and layout facets, the first two for top-down electrical synthesis and bottom-up verification, the latter used during bottom-up physical synthesis; (3) the design for reusability set of tools, methods, and guidelines that, relying on intensive parameterization as well as on design knowledge capture and encapsulation, allows to produce fully reusable AMS blocks.
Reuse Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits features a very detailed, tutorial, and in-depth coverage of all issues and must-have properties of reusable AMS blocks, as well as a thorough description of the methods and tools necessary to implement them. For the first time, this has been done hierarchically, covering one by one the different stages of the design flow, allowing us to examine how the reusable block yields its benefits, both in design time and correct performance.
Are memory applications more critical than they have been in the past? Yes, but even more critical is the number of designs and the sheer number of bits on each design. It is assured that catastrophes, which were avoided in the past because memories were small, will easily occur if the design and test engineers do not do their jobs very carefully.
High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is based on the author's 20 years of experience in memory design, memory reliability development and memory self test.
High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is written for the professional and the researcher to help them understand the memories that are being tested.
Functional Verification Coverage Measurement and Analysis is the first book to introduce a useful taxonomy for coverage metric classification. Using this taxonomy, the reader clearly understands the process of creating an effective coverage model. A must read!
Harry Foster, Jasper Design Automation, Co-Author of Assertion-Based Design
Andrew's book is the most thoughtful and comprehensive treatment of coverage I have seen. I recommend reading (and re-reading) this book to anybody who is really serious about functional verification.
Yoav Hollander, CTO, Verisity Design
In the last few years, coverage has become a must in hardware verification and in software testing. From having to push people to use coverage, the situation changed to great interest... Andrew's excellent and comprehensive book on coverage, the first of its kind, could not have come at a better time.
Shmuel Ur, Research Scientist, IBM