Phase-Locked Loop Synthesizer Simulation

McGraw Hill Professional

Phase Locked Loop frequency synthesis is a key component of all wireless systems. This is a complete toolkit for PLL synthesizer design, with MathCAD, SIMetrix files included on CD, allowing readers to perform sophisticated calculation and simulation exercises.
  • Describes how to calculate PLL performance by using standard mathematical or circuit analysis programs
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    About the author

    Giovanni Bianchi is a senior microwave engineer at SDS Technology in Rome, Italy, and a frequent speaker at professional gatherings such as the European Microwave Conference and IEEE MTT symposia. He was previously a principal staff engineer with Motorola PCS where he disclosed six PLL-related circuits. A reviewer of the IEEE Microwave and Guided Wave Letter since 1995, Mr. Bianchi is also a reviewer for IEEE Microwave Magazine.
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    Additional Information

    McGraw Hill Professional
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    Published on
    Mar 30, 2005
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    Best For
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    Technology & Engineering / Telecommunications
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    Content Protection
    This content is DRM protected.
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