Sequential Logic: Analysis and Synthesis

CRC Press
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Until now, there was no single resource for actual digital system design. Using both basic and advanced concepts, Sequential Logic: Analysis and Synthesis offers a thorough exposition of the analysis and synthesis of both synchronous and asynchronous sequential machines.

With 25 years of experience in designing computing equipment, the author stresses the practical design of state machines. He clearly delineates each step of the structured and rigorous design principles that can be applied to practical applications. The book begins by reviewing the analysis of combinatorial logic and Boolean algebra, and goes on to define sequential machines and discuss traditional and alternative methods for synthesizing synchronous sequential machines. The final chapters deal with asynchronous sequential machines and pulse-mode asynchronous sequential machines. Because this volume is technology-independent, these techniques can be used in a variety of fields, such as electrical and computer engineering as well as nanotechnology.

By presenting each method in detail, expounding on several corresponding examples, and providing over 500 useful figures, Sequential Logic is an excellent tutorial on analysis and synthesis procedures.
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Additional Information

Publisher
CRC Press
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Published on
Oct 3, 2018
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Pages
912
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ISBN
9781420007855
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Best For
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Language
English
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Genres
Computers / Computer Engineering
Computers / Microprocessors
Technology & Engineering / Electronics / Circuits / General
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Content Protection
This content is DRM protected.
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Eligible for Family Library

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Embedded and Networking Systems: Design, Software, and Implementation explores issues related to the design and synthesis of high-performance embedded computer systems and networks. The emphasis is on the fundamental concepts and analytical techniques that are applicable to a range of embedded and networking applications, rather than on specific embedded architectures, software development, or system-level integration. This system point of view guides designers in dealing with the trade-offs to optimize performance, power, cost, and other system-level non-functional requirements.

The book brings together contributions by researchers and experts from around the world, offering a global view of the latest research and development in embedded and networking systems. Chapters highlight the evolution and trends in the field and supply a fundamental and analytical understanding of some underlying technologies. Topics include the co-design of embedded systems, code optimization for a variety of applications, power and performance trade-offs, benchmarks for evaluating embedded systems and their components, and mobile sensor network systems. The book also looks at novel applications such as mobile sensor systems and video networks.

A comprehensive review of groundbreaking technology and applications, this book is a timely resource for system designers, researchers, and students interested in the possibilities of embedded and networking systems. It gives readers a better understanding of an emerging technology evolution that is helping drive telecommunications into the next decade.

The demands of increasingly complex embedded systems and associated performance computations have resulted in the development of heterogeneous computing architectures that often integrate several types of processors, analog and digital electronic components, and mechanical and optical components—all on a single chip. As a result, now the most prominent challenge for the design automation community is to efficiently plan for such heterogeneity and to fully exploit its capabilities.

A compilation of work from internationally renowned authors, Model-Based Design for Embedded Systems elaborates on related practices and addresses the main facets of heterogeneous model-based design for embedded systems, including the current state of the art, important challenges, and the latest trends. Focusing on computational models as the core design artifact, this book presents the cutting-edge results that have helped establish model-based design and continue to expand its parameters.

The book is organized into three sections: Real-Time and Performance Analysis in Heterogeneous Embedded Systems, Design Tools and Methodology for Multiprocessor System-on-Chip, and Design Tools and Methodology for Multidomain Embedded Systems. The respective contributors share their considerable expertise on the automation of design refinement and how to relate properties throughout this refinement while enabling analytic and synthetic qualities. They focus on multi-core methodological issues, real-time analysis, and modeling and validation, taking into account how optical, electronic, and mechanical components often interface.

Model-based design is emerging as a solution to bridge the gap between the availability of computational capabilities and our inability to make full use of them yet. This approach enables teams to start the design process using a high-level model that is gradually refined through abstraction levels to ultimately yield a prototype. When executed well, model-based design encourages enhanced performance and quicker time to market for a product. Illustrating a broad and diverse spectrum of applications such as in the automotive aerospace, health care, consumer electronics, this volume provides designers with practical, readily adaptable modeling solutions for their own practice.
Addresses the Challenges Associated with System-on-Chip Integration

Network-on-Chip: The Next Generation of System-on-Chip Integration examines the current issues restricting chip-on-chip communication efficiency, and explores Network-on-chip (NoC), a promising alternative that equips designers with the capability to produce a scalable, reusable, and high-performance communication backbone by allowing for the integration of a large number of cores on a single system-on-chip (SoC). This book provides a basic overview of topics associated with NoC-based design: communication infrastructure design, communication methodology, evaluation framework, and mapping of applications onto NoC. It details the design and evaluation of different proposed NoC structures, low-power techniques, signal integrity and reliability issues, application mapping, testing, and future trends.

Utilizing examples of chips that have been implemented in industry and academia, this text presents the full architectural design of components verified through implementation in industrial CAD tools. It describes NoC research and developments, incorporates theoretical proofs strengthening the analysis procedures, and includes algorithms used in NoC design and synthesis. In addition, it considers other upcoming NoC issues, such as low-power NoC design, signal integrity issues, NoC testing, reconfiguration, synthesis, and 3-D NoC design.

This text comprises 12 chapters and covers:

The evolution of NoC from SoC—its research and developmental challenges NoC protocols, elaborating flow control, available network topologies, routing mechanisms, fault tolerance, quality-of-service support, and the design of network interfaces The router design strategies followed in NoCs The evaluation mechanism of NoC architectures The application mapping strategies followed in NoCs Low-power design techniques specifically followed in NoCs The signal integrity and reliability issues of NoC The details of NoC testing strategies reported so far The problem of synthesizing application-specific NoCs Reconfigurable NoC design issues Direction of future research and development in the field of NoC

Network-on-Chip: The Next Generation of System-on-Chip Integration covers the basic topics, technology, and future trends relevant to NoC-based design, and can be used by engineers, students, and researchers and other industry professionals interested in computer architecture, embedded systems, and parallel/distributed systems.

Verilog Hardware Description Language (HDL) is the state-of-the-art method for designing digital and computer systems. Ideally suited to describe both combinational and clocked sequential arithmetic circuits, Verilog facilitates a clear relationship between the language syntax and the physical hardware. It provides a very easy-to-learn and practical means to model a digital system at many levels of abstraction.

Computer Arithmetic and Verilog HDL Fundamentals details the steps needed to master computer arithmetic for fixed-point, decimal, and floating-point number representations for all primary operations. Silvaco International’s SILOS, the Verilog simulator used in these pages, is simple to understand, yet powerful enough for any application. It encourages users to quickly prototype and de-bug any logic function and enables single-stepping through the Verilog source code. It also presents drag-and-drop abilities.

Introducing the three main modeling methods—dataflow, behavioral, and structural—this self-contained tutorial—

Covers the number systems of different radices, such as octal, decimal, hexadecimal, and binary-coded variations

Reviews logic design fundamentals, including Boolean algebra and minimization techniques for switching functions

Presents basic methods for fixed-point addition, subtraction, multiplication, and division, including the use of decimals in all four operations

Addresses floating-point addition and subtraction with several numerical examples and flowcharts that graphically illustrate steps required for true addition and subtraction for floating-point operands

Demonstrates floating-point division, including the generation of a zero-biased exponent

Designed for electrical and computer engineers and computer scientists, this book leaves nothing unfinished, carrying design examples through to completion. The goal is practical proficiency. To this end, each chapter includes problems of varying complexity to be designed by the reader.

Sequential Logic and Verilog HDL Fundamentals discusses the analysis and synthesis of synchronous and asynchronous sequential machines. These machines are implemented using Verilog Hardware Description Language (HDL), in accordance with the Institute of Electrical and Electronics Engineers (IEEE) Standard: 1364-1995.

The book concentrates on sequential logic design with a focus on the design of various Verilog HDL projects. Emphasis is placed on structured and rigorous design principles that can be applied to practical applications. Each step of the analysis and synthesis procedures is clearly delineated. Each method that is presented is expounded in sufficient detail with accompanying examples. Many analysis and synthesis examples use mixed-logic symbols incorporating both positive- and negative-input logic gates for NAND (not AND) and NOR (not OR) logic, while other examples utilize only positive-input logic gates. The use of mixed logic parallels the use of these symbols in the industry.

The book is intended to be a tutorial, and as such, is comprehensive and self-contained. All designs are carried through to completion—nothing is left unfinished or partially designed. Each chapter contains numerous problems of varying complexity to be designed by the reader using Verilog HDL design techniques. The Verilog HDL designs include the design module, the test bench module that tests the design for correct functionality, the outputs obtained from the test bench, and the waveforms obtained from the test bench.

Sequential Logic and Verilog HDL Fundamentals presents Verilog HDL with numerous design examples to help the reader thoroughly understand this popular hardware description language. The book is designed for practicing electrical engineers, computer engineers, and computer scientists; for graduate students in electrical engineering, computer engineering, and computer science; and for senior-level undergraduate students.

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