Reliability of RoHS-Compliant 2D and 3D IC Interconnects

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Proven 2D and 3D IC lead-free interconnect reliability techniques

Reliability of RoHS-Compliant 2D and 3D IC Interconnects offers tested solutions to reliability problems in lead-free interconnects for PCB assembly, conventional IC packaging, 3D IC packaging, and 3D IC integration. This authoritative guide presents the latest cutting-edge reliability methods and data for electronic manufacturing services (EMS) on second-level interconnects, packaging assembly on first-level interconnects, and 3D IC integration on microbumps and through-silicon-via (TSV) interposers. Design reliable 2D and 3D IC interconnects in RoHS-compliant projects using the detailed information in this practical resource.

Covers reliability of:

  • 2D and 3D IC lead-free interconnects
  • CCGA, PBGA, WLP, PQFP, flip-chip, lead-free SAC solder joints
  • Lead-free (SACX) solder joints
  • Low-temperature lead-free (SnBiAg) solder joints
  • Solder joints with voids, high strain rate, and high ramp rate
  • VCSEL and LED lead-free interconnects
  • 3D LED and 3D MEMS with TSVs
  • Chip-to-wafer (C2W) bonding and lead-free interconnects
  • Wafer-to-wafer (W2W) bonding and lead-free interconnects
  • 3D IC chip stacking with low-temperature bonding
  • TSV interposers and lead-free interconnects
  • Electromigration of lead-free microbumps for 3D IC integration

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John H. Lau, Ph.D., P.E., IEEE Fellow, ASME Fellow, ITRI Fellow spent 25 years in the electronics industry in Palo Alto, California, and currently serves as fellow at the Electronics & Optoelectronics Laboratories, Industrial Technology Research Institute (ITRI), Taiwan. He has published 15 books with McGraw-Hill, including Advanced MEMS Packaging and Electronics Manufacturing.

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